Performance Analysis of 6T and 11T SRAM Cell Topologies at 45nm Era

Abstract

The cadence virtuoso tool was utilized in this study to simulate a 45-nm innovation GPDK using the cadence virtuoso tool. Power consumption is a significant issue for electronic gadgets in today's society. Memory takes up 40 to 50 percent of the total amount of space in a computer system. Consequently, the main focus of this research is on lowering the write power, read power, and leakage power consumption of SRAM cells. The read and write power, leakage power, read/write delay, rise/fall time, rise time, and power delay product are all calculated in standard 6T and 11T SRAM cells. In comparison to a conventional 6T SRAM cell, the 11T SRAM cell provides 92.5 percent more read power and 8.0 percent greater write power. Additionally, an 11T SRAM cell has a 45.76 percent lower read leakage power and a 99 percent lower write leakage power when compared to a 6T SRAM cell. An 11T SRAM cell's rise and fall times are 97.5 percent quicker while reading and 71.06 percent faster when writing. The read power delay product of an 11T SRAM cell is 3.89 times lower than that of a 6T SRAM cell.