Packaging of GaAs signal processors on multichip modules

Abstract

The extensions that must be made to the deposited multichip module (MCM-D) fabrication technology and to the design and layout of these structures in order to accommodate high clock rate ECL and GaAs digital integrated circuits are discussed. Techniques for attachment of the high clock rate chips to the MCM-Ds are discussed, including wire bond, tape automated bond (TAB), flip-chip solder attachment, and flip adhesives. The tradeoffs between these different approaches are noted. Electrical issues are addressed. The problem of launching fast rise time, wide bandwidth signals onto and retrieving such signals from the MCM-Ds are noted. The thermal problems associated with the packing of 10-50 high power dissipation chips onto such small structures are discussed, along with methods of removing such high levels of heat by changes in materials incorporated into the stacked structures. Several MCM-D design and fabrication projects under way which attempt to address and solve some of the problems are described, along with some of the initial results of these studies.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>