P-type double gate junctionless tunnel field effect transistor

Abstract

We have investigated the 20 nm p-type double gate junctionless tunnel field effect transistor (P-DGJLTFET) and the impact of variation of different device parameters on the performance parameters of the P-DGJLTFET is discussed. We achieved excellent results of different performance parameters by taking the optimized device parameters of the P-DGJLTFET. Together with a high-k dielectric material (TiO2) of 20 nm gate length, the simulation results of the P-DGJLTFET show excellent characteristics with a high ION of ∼0.3 mA/μm, a low IOFF of ∼30 fA/μm, a high ION/IOFF ratio of ∼1 × 1010, a subthreshold slope (SS) point of ∼23 mV/decade, and an average SS of ∼49 mV/decade at a supply voltage of −1 V and at room temperature, which indicates that P-DGJLTFET is a promising candidate for sub-22 nm technology nodes in the implementation of integrated circuits.