Abstract
Depleted Complementary Metal-Oxide-Semiconductor (CMOS) sensors are emerging as one of the main candidate technologies for future tracking detectors in high luminosity colliders. Their capability of integrating the sensing diode into the CMOS wafer hosting the front-end electronics allows for reduced noise and higher signal sensitivity, due to the direct collection of the sensor signal by the readout electronics. They are suitable for high radiation environments due to the possibility of applying high depletion voltage and the availability of relatively high resistivity substrates. The use of a CMOS commercial fabrication process leads to their cost reduction and allows faster construction of large area detectors. In this contribution, a general perspective of the state of the art of CMOS detectors for High Energy Physics experiments is given. The main developments carried out with regard to these devices in the framework of the CERN RD50 collaboration are summarized.
Highlights
Current large pixel detectors in High Energy Physics, such as the ones which will be part of theA Toroidal LHC (Large Hadron Collider) ApparatuS (ATLAS) Tracker Detector [1] or the CompactMuon Solenoid (CMS) Tracker Detector [2] upgrades for the High-Luminosity Large Hadron Collider (HL-LHC), mostly follow a hybrid approach
This fact allows for independent development of the sensor and readout electronics technologies to cope with high radiation environments and particle rates
The size of depleted monolithic active pixel sensors (DMAPS) will be constrained by the wafer sizes used in the Complementary Metal-Oxide-Semiconductor (CMOS) process to manufacture the sensors
Summary
Current large pixel detectors in High Energy Physics, such as the ones which will be part of the. This fact allows for independent development of the sensor and readout electronics technologies to cope with high radiation environments and particle rates. A promising alternative to the current hybrid approach is the so-called depleted monolithic active pixel sensors (DMAPS) The size of DMAPS will be constrained by the wafer sizes used in the CMOS process to manufacture the sensors (standard sizes up to 200 and 300 mm can be used currently) This technology can save material budget due to its reduced thickness. The depleted CMOS sensor technology offers several clear advantages, there are some aspects which still have to be improved, as the radiation tolerance, the timing resolution and the readout capability to cope with high particle rates
Sign-in/Register to view highlights & summary Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
