Optimized Threshold Voltage Variation for Tunable Body Biasing CMOS Power Amplifier

Abstract

In this work, variation in threshold voltage is optimized for tunable body biasing CMOS power amplifier (PA). A two stage tunable biasing circuit is designed and integrated with class AB PA which improves variability in threshold voltage. Three most popular materials gallium arsenide, silicon and gallium nitride with two predictive technology model of 65 and 45 nm are employed for the analysis of threshold voltage optimization. A conventional single stage of tunable body biasing class AB PA is compared with a proposed PA of two stages. This concept demonstrates that threshold voltage variation can be lowered further if body biasing circuit is employed on the subsequent higher stages. The adaptive two stage body biasing design with class AB PA is analyzed with derived analytical equations. The calculated results shows gallium arsenide offers minimum variability in threshold voltage as compared to silicon and gallium nitride. Additionally, this class AB PA topology is simulated and fabricated for silicon material using 45 nm CMOS technology. The simulation results improve the robustness of the circuit in terms of performance parameters. S-parameter analysis is done that gives good agreement between simulated and measured results.