Optimized Design of Column Level ADC for CMOS Imager using 180 nm Technology

Abstract

An integrating type ADC is the most commonly used column level ADC for its simple architecture and small surface area. 12-bit Dual slope ADC is developed which has less complexity in design. This architecture has basic advantage that it eliminates the dependence of the conversion on the linearity and accuracy of the slope. The main block of this circuit is opamp. Two stage opamp is developed which has gain of 78dB. Dual slope integrator is designed which has one resistance in feed forward path and one feedback capacitance with opamp circuit. This dual slope column level ADC minimizes the conversion time. CMOS process is used because it provides high integration capabilities. This column level dual slope ADC is implemented using 180nm technology.