Abstract
Structural and electrical properties of layers were characterized at various process conditions. It was concluded that the high temperature silicide anneal must be kept below 850°C in order to maintain the integrity of the film and uniformity of the interface. A high temperature anneal at 800°C for 30 min was sufficient to produce the low resistivity C‐54 phase films. Maximum arsenic dose in the polysilicon layer was limited to to insure formation of thick and uniform films. An additional arsenic implant into the film before the high temperature anneal at 800°C was necessary in order to reduce the to n+‐polysilicon contact resistance. A high performance 4‐bit analog to digital (A/D) converter has been successfully demonstrated using this optimized process as part of an advanced bipolar IC process.
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