Optimal Lid Design Parameters for Reducing Warpage of Flip-chip Package

Abstract

Abstract Flip-chip packages are usually integrated with a stiffener ring (SR) or lid to reduce the warpage which usually consumes considerable substrate space and hence, reduce the effective area available for placement of dies and passive components. With chip module size growing in modern semiconductor devices (e.g., to enable heterogeneous integration of different functional dies), there is a need to reduce the substrate area occupied by the lid while also reducing the package warpage to an allowable value. This requires an accurate understanding of how different parameters of the lid affect the warpage of the package. Here, for a large package, effects of the lid design variables, including (i) SR versus lid, (ii) lid foot width, (iii) lid plate thickness to foot width ratio, (iv) lid material, and (v) thickness of thermal interface material (TIM) connecting the die and the lid, on the warpage have been analyzed using the 3-D elasticity theory and the finite element method. It is found that for a given value of the lid plate thickness to foot width ratio, the warpage of the package is a non-monotonic function of the foot width and is not necessarily minimum for the maximum value of the foot width. The effects of lid material and TIM thickness are found to depend upon the foot width. Various results presented here should provide packaging engineers with guidelines to obtain optimal lid designs that minimize the package warpage while offering noticeable saving in the effective substrate area.