One week TAT of 0.8μm CMOS gate array with analog elements for educational exercise

Abstract

We will open an one week TAT (turn around time) chip fabrication service using 0.8μm CMOS gate array with analog elements. We assume that CMOS gate array chips are very useful for a bachelor course exercise or a first chip fabrication trial for freshmen just joined in your labs., particularly if the gate array has analog elements such as resistors and MIM capacitors. This paper describes our detailed plan for the service release as well as brief measurement results of a pilot run.