Abstract
This paper focuses on the modeling of the avalanche multiplication coefficient in state-of-the-art SiGe:C HBTs suffering from radical self-heating and impact-ionization effects. Experimental data are measured in a wide current range on devices fabricated during the DOTFIVE project and used as a reference. A comparative analysis of the available empirical descriptions for the avalanche coefficient is made at low current density; the best model is then extended to account for medium/high-current effects by resorting to a suitable parameter optimization methodology. The same procedure is adopted to examine the accuracy of physics-based formulations implemented in advanced transistor models for circuit design.
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