On the ESD behavior of hydrogenated amorphous silicon based high-voltage TFTs

Rajat Sinha,Mayank Shrivastava,Sanjiv Sambandan

doi:10.1109/icee56203.2022.10117808

On the ESD behavior of hydrogenated amorphous silicon based high-voltage TFTs

Rajat Sinha, Mayank Shrivastava + Show 1 more

https://doi.org/10.1109/icee56203.2022.10117808

Copy DOI

Publication Date: Dec 11, 2022

Affiliation: Indian Institute of Science Bangalore, University of Cambridge

#Electrostatic Discharge Behavior #Electrostatic Discharge Robustness + Show 8 more

Abstract
Full-Text PDF
Similar Papers

Abstract

In this paper, we present detailed physical insights into the electrostatic discharge (ESD) behavior of high-voltage amorphous silicon (a-Si:H) thin-film transistors (TFTs). Device architecture which provides a 4-5x times improvement in ESD robustness with the same spatial considerations is discussed. The physics behind the improvement in ESD robustness is explored, and technological parameters' impact on ESD behavior is studied. Transmission line pulse (TLP) characteristics are discussed, and the failure behavior is explored.

Full Text