Abstract
For the first time, we present the electrostatic discharge (ESD) behavior of grounded gate tunnel FET (ggTFET) with detailed physical insight into the device operation, 3-D filamentation and failure under ESD stress conditions. Current as well as time evolution of the junction breakdown, device turn-ON, voltage snapback, and finally the unique failure mechanism is studied using both 2-D and 3-D technology computer aided design simulations. The interaction between the band-to-band tunneling, avalanche multiplication, and thermal carrier generation leading to voltage snapback and failure is presented in detail. In addition, electro-thermal instability initiated filamentation and snapback discovered in the ggTFET is explained. The impact of various technology and device design parameters on the ESD behavior and robustness of TFETs is discussed. This has helped developing guidelines to design ESD robust TFETs for efficient protection concepts. Finally, the charge device model behavior of ggTFET device is discussed.
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