On the Analysis of Memory Conflicts and Bus Contentions in a Multiple-Microprocessor System

Abstract

This paper studies one of the most difficult and important problems in the design of cost-effective multiple-microprocessor systems. The combined effect of interference due to bus contentions and that due to memory conflicts is investigated. Reference models are defined and applied to obtain analytic results which can prove to be valuable tools in the design of multiple-microprocessor systems for time-critical control processes. The effect of memory mapping is also investigated and an algorithm is developed to obtain a mapping which can be used to minimize memory conflicts.