Novel self-aligned polysilicon-gate MOSFETs with polysilicon source and drain

Abstract

A novel self-aligned technique is described for self-aligning a polysilicon gate in devices with polysilicon source and drain regions. The technique is demonstrated for two types of polysilicon source and drain devices. In one type of device, the polysilicon serves as the source of dopant for diffused source and drain junctions. In the second type, the polysilicon, together with an underlying interfacial oxide, forms a tunneling CIS (conductor-thin insulator-semiconductor) structure. The characteristics of devices of both types fabricated under almost identical conditions using the new self-alignment technique are compared.