Abstract
A novel set-reset flip-flop (SR-FF) circuit integrating gate-controlled GaAs three-branch nanowire junctions (TBJs) is designed, fabricated, and characterized. Fundamental logic gates including AND, NOT, and NAND are constructed using Schottky wrap gate (WPG)-controlled TBJs together with inverter circuits that have the same configuration. The present SR-FF circuit is simply designed using a pair of cross-coupled TBJ-based NAND gates. The circuit is successfully fabricated on a GaAs-based hexagonal nanowire network. Its correct operation with a voltage transfer gain larger than unity is demonstrated. Reduction of circuit area and possible operation speed are also discussed.
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