Nonuniform Compressive Sensing via Ohmic Voltage Attenuation: A Memristive Crossbar Design Approach Leveraging Intrinsic Computation

Abstract

Compressive sensing (CS) is a promising technique for transmitting signals in power-critical applications such as Internet of Things (IoT) devices. Nonuniform CS optimizes this process by adjusting sampling frequency based on the relative importance levels characterized by the signal of interest. Recent advances have yielded energy-efficient hardware implementations of CS sampling, leveraging spin-based crossbar architectures for in-memory vector-matrix multiplication and through the use of probabilistic bit (p-bit) devices to generate tunable random outputs for writing the array. Thus, a region of interest is generated via column-ordered density of on-state devices. Herein, we propose a simple design for supplying inputs to the p-bit devices, based on Ohmic voltage attenuation occurring along the word lines of the crossbar array. The technique embeds some required computations to be conducted intrinsically by the cross-points of the memristive array, thus bypassing overheads of conventional instruction execution and eliminating the need for costly hardware components, such as lookup tables (LUTs) and data converters. The design is shown to be robust for various array sizes and parasitics while generating the appropriate tuning signals within a single clock cycle duration of 1.6 ns, and at an energy overhead of 333 fJ. Compared with a standard approach using LUTs and digital to-analog converters, the design herein achieves a 583-fold reduction in energy and 23-fold reduction in transistor count.