NMOS silicon gate transistors in large-area laser-crystallised silicon layers

Abstract

The properties of NMOS polycrystalline silicon gate transistors, fabricated in large-area laser-crystallised silicon layers on an insulating substrate, are described. The transistor characteristics reveal the influence of parasitic side transistors. The influence of the side-channel transistors becomes more pronounced with decreasing channel width, and has to be considered in the mobility calculations. The electron mobility is channel-length dependent, and varies from 780 cm2 V−1 s−1 at L = 5 μm to 200 cm2 V−1 s−1 at L = 100 μm. Leakage currents at VD = 4.9 V are typically 15 pA/μm, although 20% of transistors with channel length less than 10 μm show leakage currents in excess of 1 μA. The threshold voltage depends on the drain voltage, as is typical for silicon-on-insulator structures.