Nitric Acid Oxidation Method to Form a Gate Oxide Layer in Sub-Micrometer TFT

Abstract

We have succeeded in fabrication of sub-micrometer TFT which can be operated at 1.5 V, having stack gate oxide structure formed by the nitric acid oxidation of Si (NAOS) method. The ultrathin NAOS SiO2 layer possesses a low leakage current density, and consequently, the gate oxide layer afterward deposited by the CVD method can be made as thin as 20 nm. Because of the thin gate oxide, miniaturization of TFT with the 0.6 µm gate length is achieved. The operation voltage of the TFTs can be set at as low as 1.5 V because of the low threshold voltages (i.e., −0.5 V for P-ch TFT and 0.5 V for N-ch TFT). The sub-threshold swing value is ~80 mV/decade and the on/off ratio is ~109 for both the P-ch and N-ch TFTs. The channel mobility is ~100 cm2/V•s for the P-ch TFT and ~200 cm2/V•s for the N-ch TFT.