Ultralow Power TFT with Stacked Gate Oxide Consisting of Ultrathin Oxide Layer Formed by the Nitric Acid Oxidation of Si (NAOS) Method and CVD-SiO2 Thin Layer

Abstract

Ultralow power consumption is an important requirement for thin film transistors (TFTs) used in system liquid crystal displays (LCDs). The nitric acid oxidation of Si (NAOS) method can form an ultrathin SiO2 layer with excellent interface characteristics, leading to vast decrease in the power consumption. The total thickness of the gate oxide with an ultrathin NAOS SiO2 layer of poly-Si-based TFT can be decreased from 80 nm to 20 nm. The thin gate oxide lowers the threshold voltage from 12 V to 1.5 V, resulting in a reduction of power consumption to 1/64. The gate leakage current is below the noise level, and the on/off ratio is more than 108. The S value is 80-100 mV/dec, and the channel mobility is 130-100 cm2/V·s for P-ch TFTs and 200-160 cm2/V·s for N-ch TFTs.