Abstract
This paper presents new experimental findings on the hot-carrier-induced degradation in lateral DMOS with different gate oxide thickness and when it is stressed at elevated temperature. For thin oxide devices, the generation of interface states and the trapped holes are the causes of the reduction of I DS in the linear region and the increase of I DSAT in the saturation region, respectively. For thick oxide devices, the generation of interface states plays a dominant role for the reduction of I DS in both linear and saturation region. It is observed that the breakdown voltage of both thin and thick oxide devices is increased and the device degradation is reduced at elevated stress temperature.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.