On The Interaction of ESD, NBTI and HCI in 65nm Technology

Abstract

A comprehensive study on the interaction between ESD, NBTI and HCI on silicide blocked (SBLK) PFET devices is presented for a state-of-the-art 65nm bulk technology. ESD behavior of thin and thick oxide devices are shown to have opposite channel length dependence. The study of NBTI-ESD interaction on thin oxides devices shows that non-destructive ESD pre-stressing worsens the NBTI degradation. On the other hand NBTI pre-stressed thick oxide devices show high on-resistance during ESD characterization. It is shown that in thin oxide long channel length devices at high temperature pure NBTI is the worst case degradation mode whereas in short channel length devices combined "HC-NBTI" degradation dominates. Furthermore, we observed that while a SBLK PFET is HC stressed at high temperature then NBTI also takes place simultaneously, resulting in "HC-NBTI" co-activation, which is found to be channel length dependent. Finally, we have shown that HC degradation is worse at high temperature than at room temperatures due to this NBTI co-activation.