Abstract

Nanoscale two-bit/cell three-dimensional NAND silicon-oxide-nitride-oxide-silicon (SONOS) flash memories with an advanced saddle structure separated from the tunneling oxide-charge trap layerblocking oxide were designed to increase the storage density of the memory devices and to remove the short channel and narrow width effects. The narrow charge distribution of the trap charge in the two-bit/cell SONOS memories was achieved due to the structural separation of the charge trap layer. The program and the erase efficiencies were simulated by using technology computer-aided design tools. The program and the erase characteristics of the Fowler-Nordheim tunneling processes were estimated to verify the unique two-bit/cell SONOS memories. The memory density and the operating speed of the proposed nanoscale two-bit/cell NAND SONOS memories were larger.

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