N-Channel Metal–Oxide–Semiconductor Field-Effect Transistor Modeling in Forward Body Bias Condition for Low Voltage Complementary Metal–Oxide–Semiconductor Circuits Design

Abstract

This paper proposes a modified transistor model to improve the accuracy under the forward body bias operation that is vital for low voltage circuits, such as 0.5 V, to reduce the power consumption of complementary metal–oxide–semiconductor (CMOS) LSI. The proposed model and equations were implemented in BSIM4 version 4.6 with SPICE3f5 and verified by measurements of 60 nm n-channel metal–oxide–semiconductor field-effect transistors (n-MOSFETs). Approximately 50% inaccuracy of the drain current can be corrected. Furthermore, the importance of the proposed model will become higher with further lower threshold voltage operation requirements.