Forward Body Bias Technique for Low Voltage and Area Constrained LDO Design in Deep Submicron Technologies

Abstract

A method for expanding low dropout (LDO) regulator functionality under low supply voltage and area constrained applications is presented. This is accomplished using forward body bias (FBB) technique onto an LDO's pass element. Here, the MOS' bulk-source PN junction is forward biased thereby reducing the effective threshold voltage. This lead to a narrower MOS width for the same current drive when compared to a pass element without bulk effect, as well as, a comparable “on” resistance when compared to a wider MOS. Consequently, a lower dropout voltage is also achieved when compared to a similar MOS without FBB. This work also presents a suitable ultra-low power FBB driver circuit and a switching network that reduces the leakage current from the pass element. Finally, this work shows a theoretical framework for the FBB with consideration to maximum threshold voltage reduction, width reduction and minimum supply voltage. SPICE simulations verify the functionality of the technique using BSIM3 and Predictive Technology MOS Models.