Abstract
An experimental study of the hysteresis ID-VG characteristics in n-channel silicon-on-insulator metal-oxide-semiconductor transistors is reported. The result shows that the hysteresis is induced by multistable floating body potentials. An analytical model, which is based on the nonlinear feedback of carrier generation via multiplication and carrier discharge through parasitic bipolar action, also reveals that multistable floating body potentials are responsible for the hysteresis in ID-VG characteristics. To alleviate hysteresis effect, it is essential to reduce the parasitic bipolar current gain α and multiplication factor M. The reduction of α and M can be achieved by optimal source/drain design.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.