Multiple Scales Method in VLSI Interconnects Threshold Crossing Time Calculation

Abstract

The calculation of the threshold crossing time of the on-chip very large scale integration (VLSI) interconnects is an important part of interconnect simulation. The paper focuses on low-loss on-chip upper layer interconnect simulation. The work presents a new way of calculating the closed form output voltage and threshold crossing time formulas based on differential equation multiple scales solving method. The analytical form of output voltage for the step and ramp excitation is derived and the threshold crossing time formula is proposed. The presented approach of output voltage calculation for a single interconnect is extended to two coupled interconnects.