Prospective current mode approach for on-chip interconnects in integrated circuit designs

Abstract

In today's sophisticated nanoera and miniaturised densely packed integrated circuit (IC) designs, on-chip interconnects have become one of the dominant governing factors in determining the overall performance of very large scale integration (VLSI) system. In pursuit to attain high performance, to quench the thirst of continuously increasing demands of semiconductor VLSI industry and to boost up the integrated applications on the calculated limited silicon chip area, hunt for new potential and prospective design techniques have always been on priority and rigorously explored by several researchers. Current mode approach for on-chip interconnects is one of the aptly suited signalling schemes and effective performance improvement techniques for high-end IC designs. An accurate analytical model formulation of on-chip interconnects together with prospective current mode signalling (CMS) scheme and evaluating their performance are crucial and important issue. In this chapter, explicit expressions of various performance metrics for on-chip interconnects are formulated. The performance of interconnects using two varying signalling schemes namely conventional voltage and advanced current mode is investigated. The various performance metrics considered are voltage swing over interconnect line, delay, power dissipation, energy dissipation and bandwidth. It is found that voltage mode signalling (VMS) has advantage of reduced power and energy dissipation of nearly 8.6% and 9.2%, respectively, as compared to CMS scheme. It is also investigated that CMS has about 53% lesser delay and 161% higher bandwidth than VMS scheme. The effect of interconnect length and pulse period variations on the performance parameters of the interconnect using VMS and CMS schemes are also analysed. The proposed analytical model results are validated using SPICE simulation EDA tool and high level of accuracy has been realised. The present work keenly focuses on advanced current mode approach and henceforth analysing the effectiveness of different signalling schemes for high performance on-chip VLSI interconnects in ICs.