Abstract
A compact and energy-efficient ternary logic gate based on MTJ-based nonvolatile logic-in-memory (NV-LIM) architecture is proposed for ternary neural network (TNN) hardware implementation. The use of feedback loops for equal-resistance sensing of magnetic tunnel junction (MTJ) devices achieves better energy efficiency as well as reduced MTJ device count and circuit area. Through an experimental evaluation of a basic component of TNN hardware, its impact on the compact and energy-efficient TNN hardware design is demonstrated.
Published Version
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have