Abstract

A process, voltage, and temperature (PVT) variation conditioning technique using magnetic tunnel junction (MTJ) devices, whose resistance values are programmable, is proposed for realizing a wider design margin in analog integrated circuits. Because MTJ devices are fabricated on top of the CMOS integrated circuit layer, there is a small chip-area overhead for inserting additional MTJ devices into analog circuits, which makes it easy to use the variation-conditioning technique frequently on the entire chip. Additionally, the use of series-parallel connections for MTJ devices allows more flexible adjustment of the resistance. As a typical example, we demonstrate that under 0.18 mm CMOS technology, a simple operational Tran conductance amplifier (OTA) using the proposed technique outperforms a conventional OTA without any variation-conditioning technique.

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