Abstract
Near threshold circuits (NTC) are an attractive and promising technology that provides significant power savings with some delay penalty. The combination of NTC technology with MOS current mode logic (MCML) is examined in this work. By combining MCML with NTC, the constant power consumption of MCML is reduced to leakage power levels that can be tolerated in certain modern applications. Additionally, the speed of NTC is improved due to the high speed nature of MCML technology. A 14 nm Fin field effect transistor (FinFET) technology is used to evaluate these combined circuit techniques. A 32-bit Kogge Stone adder is chosen as a demonstration vehicle for feasibility analysis. MCML with NTC is shown to yield enhanced power efficiency when operated above 1 GHz with a 100% activity factor as compared to standard CMOS. MCML with NTC is more power efficient than standard CMOS beyond 9 GHz over a wide range of activity factors. MCML with NTC also exhibits significantly lower noise levels as compared to standard CMOS. The results of the analysis demonstrate that pairing NTC and MCML is efficient when operating at high frequencies and activity factors.
Highlights
In the era of handheld mobile devices, the performance of integrated circuits is a primary concern.Power consumption and speed are two primary characteristics of high performance integrated circuits [1].In this work, both of these characteristics are addressed by utilizing low power near threshold circuits (NTC) [2] in combination with high speed MOS current mode logic (MCML) [3]
The results of the analysis demonstrate that pairing NTC and MCML is efficient when operating at high frequencies and activity factors
This behavior is in contrast to standard CMOS gates, which have fewer design parameters, and each parameter independently affects the operating point
Summary
In the era of handheld mobile devices, the performance of integrated circuits is a primary concern. Power consumption and speed are two primary characteristics of high performance integrated circuits [1]. In this work, both of these characteristics are addressed by utilizing low power near threshold circuits (NTC) [2] in combination with high speed MOS current mode logic (MCML) [3]. A similar reduction in supply voltage, results in a ten times reduced speed of near threshold circuits as compared to circuits operating at the nominal supply voltage. MCML utilizes a differential circuit topology driven by a constant tail current and is generally characterized by high speed and high power consumption.
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