Mono3D: Open Source Cell Library for Monolithic 3-D Integrated Circuits

Abstract

Monolithic 3-D (M3-D) integrated circuits (ICs) provide vertical interconnects with comparable size to on-chip metal vias, and therefore, achieve ultra-high density device integration. This fine-grained connectivity enabled by monolithic inter-tier vias reduces the silicon area, overall wirelength, and power consumption. An open source standard cell library for design automation of large-scale transistor-level M3-D ICs is developed, thereby facilitating future research on the critical aspects of M3-D technology. The cell library is based on full-custom design of each standard cell and is fully characterized by using existing design automation tools. The proposed open source cell library is utilized to demonstrate the M3-D implementation of several benchmark circuits of various sizes ranging from 2.7-K gates to 1.6-M gates. Both power and timing characteristics of the M3-D ICs are quantified. Several versions of the cell library are developed with different number of routing tracks to better understand the issue of routing congestion in the M3-D ICs. The effect of the number of routing tracks on area, power, and delay characteristics is investigated. Finally, the primary clock tree characteristics of the M3-D ICs are discussed.