Modelling and mitigating oscillation in E-mode GaN HEMT: A simulation-based approach to parasitic inductance optimization

Abstract

The escalating demands in energy conversion necessitate the evolution of efficient power electronic devices beyond the limitations of traditional silicon (Si) counterparts. This research delves into the intricacies of the Enhancement mode Gallium Nitride High Electron Mobility Transistor (E-mode GaN HEMT). A focus is placed on its static characterization, parameter analysis, and the influence of external parasitic inductances, particularly regarding oscillation challenges during its hard switching process. Forward and revise bias are conducted through comparison with Si-MOSFET and Cascade-GaN HEMT, along with its static on-resistance and transfer characteristics. Through rigorous half-bridge double pulse circuit LTSPICE simulations, this study deciphers the turn-on and turn-off dynamics of the E-mode GaN HEMT. By scrutinizing various parasitic inductances, the research elucidates mechanisms instigating high-frequency voltage and current oscillations. Significantly, the research presents a hierarchy of parasitic inductance influences, employing an energy loss comparison. This analysis underscores the prominent impact of the common source parasitic inductance, which exhibits energy loss increases of 23.6 % and 22.7 % at junction temperatures of 25 °C and 75 °C, respectively. Building on these insights, the study recommends strategies to mitigate the effects of external parasitic inductance, underscoring the pivotal role of oscillation suppression in advanced GaN Printed Circuit Board (PCB) and Integrated Circuit (IC) designs. This comprehensive inquiry provides a blueprint for enhancing GaN circuit designs, paving the way for their optimal application in the evolving realm of power electronics.