An investigation into the thermal surface contact resistance, fin width and temperature on negative bias temperature instability during self-heating

Abstract

This work investigates the impacts of the thermal surface contact resistance (SR), fin width and temperature on the negative bias temperature instability (NBTI) during self-heating based on 14 nm p-FinFET through technology computer-aided design (TCAD) tool. In order to promote the accuracy of simulation, the experimental data are used to calibrate the TCAD results. The simulation results reveal that as SR increases, the lattice temperature rises by 20.07 %, which leads to a 15.84 % decrease of the carrier mobility and finally a reduction of the saturation current by 5.07 %. Moreover, as WFin decreases from 8 nm to 2 nm, the device threshold voltage increases by 15.41 %, resulting in that the saturation current reduces by 19.06 %. Besides, with an increase of the ambient temperature from 300 K to 500 K, the lattice temperature and trapped charge rise by 60.48 % and 12.53 %, respectively, which eventually leads to an 18.13 % decrease of the saturation current.