Abstract
Bang-Bang clock and data recovery (BBCDR) circuits are hard nonlinear systems due to the nonlinearity introduced by the binary phase detector (BPD). The specification of the CDR frequency response is determined by jitter tolerance and jitter transfer. In this paper, jitter transfer and jitter tolerance of the second-order BBCDR are characterized by formulating the time domain waveforms. As a result, a new equation is presented to obtain corner frequency. Also, the jitter tolerance is expressed in closed form as a function of loop parameters. The proposed method is general enough to be used for designing BBCDR. The analysis is verified using behavioral simulations in MATLAB. Simulation results demonstrate the validity of the result obtained by analytical equations.
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