Abstract
A new quantitative model of the effect of the gate bias on the threshold voltage of metal-oxide-semiconductor (MOS) structures under ionizing irradiation is developed based on the consideration of hole trapping from the entire volume of the gate dielectric in a thin boundary layer with hydrogen-free and hydrogen-containing traps at the interface with a silicon substrate. The model makes it possible to adequately describe a gradual increase in the threshold voltage with gate bias as approximately linear with dose for the surface component and nonlinear for the bulk component. The threshold-voltage shift at negative gate bias is simulated based on hole generation in the boundary layer under ionizing irradiation.
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