Abstract
The Vertical Strained Silicon Germanium (SiGe) Impact Ionization MOSFET with Dielectric Pocket (VESIMOS-DP) has been successfully developed and analyzed in this paper. The electron mobility in the VESIMOS-DP (~1440m2/V-s), was found to be increased by 4% in comparison to VESIMOS (~1386 m2/V-s) device. The mobilities in strained layer is depends on the transport direction, either parallel to the original SiGe growth interface or in the perpendicular direction. Carrier mobilities in strained SiGe layer is also based on the local distortion due to the strain effects which contribute to the alloy scattering on the carriers. With the vicinity of DP, the carrier scattering effect has reduced which merits the introduction of DP on the device. Due to the DP layer, improve stability of threshold voltage, VTH and subthreshold slope, S was found for VESIMOS-DP device of various size ranging from 20nm to 80nm justified the vicinity of the DP on improving the performance of the device.
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