Abstract
Recent integration of Resistive Random Access Memory (RRAM) with standard CMOS has spurred exploration of high-density and low-power in-memory computing. RRAM arrays are being intensely investigated for analog-domain Vector Matrix Multiplication (VMM) and Neuromorphic Computing. However, to exploit the advantages of RRAM over other forms of nonvolatile memories, mixed-signal circuit designers need to accommodate their device nonidealities, and design circuits to translate high-level deep neural network algorithms to mixed-signal hardware. This brief reviews the field of neuromorphic computing using hybrid CMOS-RRAM circuits, associated circuit design challenges, and potential approaches for their mitigation, followed by benchmarking of recent demonstrations.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callMore From: IEEE Transactions on Circuits and Systems II: Express Briefs
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
