Mitigating the Effect of Multiple Event Upsets in FPGA-Based Automotive Applications

Abstract

In the Automotive Industry, many applications are currently implemented on Field Programmable Gate Arrays (FPGAs). Nowadays, due to the continuous shrinking of transistor dimensions, FPGAs are subjected to Multiple Event Upsets (MEUs) in addition to the well-studied Single Event Upsets (SEUs). Fault tolerance is often used to mitigate this problem. This paper explains why the currently utilized fault-tolerant techniques such as scrubbing will probably produce some erroneous outputs; further more Triple Modular Redundancy may not recover from MEUs. Penta Modular Redundancy can efficiently recover from MEUs as well as SEUs; however, it cannot detect some faulty scenarios. This problem is solved by using the Hexa Modular Redundancy fault tolerant technique. The reliabilities of both Penta and Hexa Modular Redundancy are calculated using Markov models to investigate whether the expected increase in system reliability outweighs the cost of extra added redundancy. Finally, the extra power consumed by the architecture due to the added redundancy is estimated using Xilinx Vivado tools.