Abstract
In this paper, the correlation between the key performance of the shunt-type single-pole-double-throw (SPDT) switch circuitry and the intrinsic device parameters is theoretically investigated by network cascading approach. Through rigorous analysis, we concluded that the intrinsic device parameters such as the gate-to-drain capacitance (Cgd) have direct impact on the performance due to the scaling of the gate length. The analysis results were verified by the implementation of an SPDT switch at millimeter-wave frequency using stacked-FET topology. An input power at 1-dB compression point (P1dB) of greater than 30 dBm was measured from 15 to 35 GHz, exhibiting an enhancement of 6-dB in comparison with the conventional topology.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have