Mechanism of floating body effect mitigation via cutting off source injection in a fully-depleted silicon-on-insulator technology**Project supported by the National Natural Science Foundation of China (Grant Nos. 61376109, 61434007, and 61176030) and the Advanced Research Project of National University of Defense Technology, China (Grant No. 0100066314001).

Abstract

In this paper, the effect of floating body effect (FBE) on a single event transient generation mechanism in fully depleted (FD) silicon-on-insulator (SOI) technology is investigated using three-dimensional technology computer-aided design (3D-TCAD) numerical simulation. The results indicate that the main SET generation mechanism is not carrier drift/diffusion but floating body effect (FBE) whether for positive or negative channel metal oxide semiconductor (PMOS or NMOS). Two stacking layout designs mitigating FBE are investigated as well, and the results indicate that the in-line stacking (IS) layout can mitigate FBE completely and is area penalty saving compared with the conventional stacking layout.