Abstract
A planar gate U-shaped (PGU) channel silicon-on-insulator (SOI) lateral insulated gate bipolar transistor (LIGBT) featuring divided gates (G1 and G2) is proposed, which aims to suppress the gate voltage (VG) overshoot and improve the di/dt controllability. In the conventional PGU structure, the hole accumulating and the electric potential rising in the JFET region leads to a displacement current to overcharge the gate during the turn-on transient. Two gate connection modes (Mode A and B) for the proposed PGU structure are discussed. Mode A with a grounded G2 can effectively enhance the VG stability, however, degenerating the on-state voltage (VON). Mode B shields the displacement current by a pre-charged G2. G2 is driven with a separate gate resistor to the main gate G1, which results in an improved di/dt controllability without deteriorating VON. When adjusted for the same turn-on loss of 5.28mJ/cm2, the di/dt of the proposed PGU structure with mode B is 74% lower than that of the conventional PGU structure.
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