Abstract
We implemented 50k-bit shift registers on SRAM-based and flash-based FPGAs to investigate their radiation hardness. As a result, soft error rates of flip flops on both FPGAs are around 40 FIT/Mbit. Mean time to failure (MTTF) in the SRAM-based one is <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$3.8 \times 10^{7}$</tex> hour/failure, while MTTF in flash-based one is <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$5.5 \times 10^{9}$</tex> hour/failure. Those results clearly show that in the SRAM-based FPGA must be rebooted or configuration memory must be refreshed much more frequently than the flash-based one.
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