Abstract
Metal-oxide-semiconductor (MOS) capacitors fabricated on in situ doped n-type Si/Si1−x−yGexCy and Si/Si1−yCy epitaxial layers were used to study the conduction band offsets in these heterojunctions. The heterostructures were grown epitaxially in a rapid thermal chemical vapor deposition reactor. Si/Si1−x−yGexCy samples with a nominal Ge concentration of 20 at. % and carbon fractions up to 1.3 at. % were studied. Carbon fractions up to 1.6 at. % were studied for the Si/Si1−yCy samples. Gate oxides were formed by thermal oxidation of the Si cap at 750 °C. X-ray diffraction measurements confirm that the processing did not affect the strain in the layers. Devices exhibit well-behaved high frequency and quasistatic capacitance–voltage (C–V) characteristics indicating the high electronic quality of the material. Capacitance–voltage measurements performed over a range of temperatures were used to extract the band offsets. Confinement of electrons at the heterointerface is apparent in the C–V curves of the Si/Si1−yCy MOS capacitors. Comparison of the measured C–V data to one-dimensional device simulations yields a conduction band edge lowering of ∼65 meV per at. % C in the Si1−yCy samples. The Si1−x−yGexCy samples, on the other hand show no evidence of electron confinement. Based on a sensitivity analysis of this technique, it is estimated that the conduction band offset in these samples is less than 30 meV. The smaller offsets in Si/Si1−x−yGexCy compared to Si/Si1−yCy can be explained by the competition between strain compensation and the intrinsic chemical effect of carbon in Si1−x−yGexCy.
Published Version
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