Abstract

A new concept for low voltage NOR Virtual Ground (NVG/sup TM/) flash memory with a fast access time is introduced. New array concepts and process technologies are introduced to achieve programming by 5 V V/sub pp/ and reading at 3 V/spl plusmn/10% V/sub cc/. The array performance is enhanced by segmentation and using extra access transistor for each segment. The control of the erased cell threshold voltage distribution is one of the key issues for the 3 V read operation in low voltage flash. The erase threshold distribution is minimized by Fowler-Nordheim tunneling and hot electron injection self-recovering techniques.

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