Effect of Charge Trapping on the Asymmetrical Shift of Memory Window in MFIS Devices

Abstract

We investigated the effects of charge trapping on the asymmetrical increase of the memory window in metal-ferroelectric-insulator-semiconductor (MFIS) devices. We suggest that defect centers located at the SBN-Y 2 O 3 interface play important roles for generating the asymmetrical increase of the memory window: For example, electron trapping at the SBN-Y 2 O 3 interface via Fowler-Nordheim tunneling (FNT) injection from the Si substrate results in the preferential domain switching, causing the asymmetrical increase of the memory window. We also suggest that FNT injection in the Pt/SBN/Si MIS capacitors causes the symmetrical increase of the memory window because the SBN-Y 2 O 3 interface does not exist. However, charge trapping in the SBN layer reduces the memory window with time after FNT injection had stopped, while no significant degradation of the memory window was observed in the Pt/SBN-Y 2 O 3 /Si capacitors.