Low‐power SOI CMOS antenna switch driver circuit with RF leakage suppression and fast switching time

Abstract

A low-power antenna switch driver circuit with RF leakage suppression and fast switching time is implemented in a 0.25 μm silicon-on-insulator (SOI) CMOS process. It is composed of a three-stage current starved ring oscillator with a clock buffer, a charge pump and a latch-based three-state logic driver. The negative voltage from the charge pump is fed into the latch-based three-state logic driver, and it generates three states of logic level (+VDD, GND and −VDD) according to the decoder signal without any reliability issue. In addition, the proposed three-state logic driver with an optimal negative resistance value reduces the amount of the RF leakage coupling into the charge pump while maintaining its switching time fast. In the measurement, the designed switch driver circuit shows 30 dB of isolation over 100 MHz to 3 GHz frequency range.