Low power logic circuit and SRAM cell applications with silicon on depletion layer CMOS (SODEL CMOS) technology

Abstract

In this paper, the AC performance of SODEL CMOS is discussed, aiming for low power CMOS applications. Propagation delay time (/spl tau/pd) in SODEL CMOS has been improved by up to 25 % in five stacked nFET inverters, and about 30% better power-delay product has been observed at same /spl tau/pd, compared to conventional (conv.) bulk CMOS. In SRAM cell applications of SODEL CMOS, a high SNM of /spl sim/95 mV was observed at Vdd = 0.6 V. Smaller bitline delay is confirmed by SPICE simulations. Latch-up immunity for /spl alpha/-particles was found to be comparable to conv. bulk CMOS. Therefore, SODEL CMOS technology will give us better solutions for low power SoCs.