Abstract

We successfully fabricate the Si0.8Ge0.2 channel fin field-effect-transistor (FinFET) with 5 nm ultra-thin fin width and high aspect ratio ( $\sim 10\times $ ) on silicon-on-insulator (SOI) substrate by simple two-step dry etching. In comparison of the conventional Si FinFET, our proposed SiGe ultra-thin FinFETs (Si0.8Ge0.2 UT-FinFET) at VD = 0.75 V & VG = 1.5 V shows higher ON-state current (1 mA/fin), even achieve lower OFF-state current (0.2 nA/fin) and steep subthreshold slope (SS) of 76 mV/decade, which is owing to the better gate control given by the ultra-thin fin channel. In addition, this work also exhibits the suppression of short channel effect (SCE) with very small drain induced barrier-lowering (DIBL) of 4 mV/V.

Highlights

  • High mobility group IV materials such SiGe and Ge have been most promising candidates for improving complementary metal-oxide-semiconductor (CMOS) performance and compatible sub-5-nm Si fin field-effect transistor (FinFET) technology platform [1]–[4]

  • Since the Fins of SiGe devices are constructed with SiGe top and the underlying Si, for avoiding the Si bottom to contribute the electron pathway, the designed implantation energy of 10 keV ensures the phosphorous ions located on Si0.8Ge0.2 active layer

  • As evident in Fig. 2 (a), the cross-sectional transmission electron microscopy (TEM) image energy dispersive spectroscopy (EDS) mapping of element distribution revealed the structural materials of the Si0.8Ge0.2 ultra-thin fin (UT-fin) FinFET

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Summary

INTRODUCTION

High mobility group IV materials such SiGe and Ge have been most promising candidates for improving complementary metal-oxide-semiconductor (CMOS) performance and compatible sub-5-nm Si fin field-effect transistor (FinFET) technology platform [1]–[4]. Ge is a promising channel material for integrating a Si CMOS because of its high electron, hole mobility and compatible process on current Si platforms, the intrinsic properties of Ge, such as lower bandgap (Eg = 0.66 eV) and larger relative permittivity (εr = 16.0) than those of Si cause it suffering from high off-state current and inevitable short channel effects (SCEs) [5]–[8]. We fabricated an Si0.8Ge0.2 UT-FinFET by using high selective dry etching to trim the Fin down to UT (5 nm) with a high aspect ratio FinFET, and study the high-performance electrical properties of Si0.8Ge0.2 UT-FinFET. The standard Si FinFET is fabricated for comparison

DEVICE FABRICATION
RESULTS AND DISCUSSION
CONCLUSION
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