Low frequency noise characterization and modeling of SiGe HBT featuring LASER annealing in a 55-nm CMOS node

Abstract

This work presents Low Frequency Noise (LFNoise) characterization and modeling performed on DPSASEG SiGe HBT integrated in a 55-nm CMOS node. The aim of this study is to evaluate the advantage brought by the implementation of a Dynamic Surface Annealing (DSA) in addition to the well-known Spike Annealing process. The HBTs are supplied by STMicroelectronics Crolles and present transit (fT) and maximum oscillation (fMAX) frequencies in the 320-370 GHz range. Spectra can be affected by the presence of generation-recombination (GR) components. The 1/f noise amplitude is modeled following the SPICE compact model, and the 1/f parameters KF and AF are calculated. The extracted figure of merit KB = KFAe has a very good value of 6.8 10-10 μm² for transistors processed using the DSA technique.