Low frequency noise and random telegraph signals in 0.35 μm silicon CMOS devices

Abstract

A detailed study of the low frequency noise in Si MOS devices from a 0.35 μm CMOS technology is presented. The normalized drain current noise WLS I d/I d 2 has been systematically investigated at a fixed frequency and constant normalized drain current. In large area devices (>5–7 μm 2), the noise is typically 1/f-like, whereas, in small area devices (≤1 μm 2), the noise stems from the contribution of one or several RTS components. In large area devices, the 1/f noise can easily be interpreted by a classical carrier number fluctuation model. A multi-RTS component scheme has to be employed in the case of small area devices.